Global – October 16, 2026 -- Lightelligence's PACE2 accelerator card combines a 128×128 optical matrix multiplier with more than 40,000 photonic devices, and the company rates both its optical and electronic cores at 32 TOPs peak performance.
Hybrid architecture pairs a photonic core with an electronic core
The card, released in 2025, uses a heterogeneous design. An optical tensor processing unit (PIC core) works alongside an electronic tensor acceleration unit and an optical computing control unit (EIC core). The chip runs at a 1GHz clock speed, and PIC latency is 200ps.
Lightelligence describes the 128×128 matrix as the largest optical computing matrix it has built. Matrix coefficients can be configured dynamically through APIs, so the card is programmable.
3D TSV packaging integrates over 40,000 photonic devices
Lightelligence uses 3D TSV advanced packaging to integrate the photonic components. The PCIe Gen4 x16 interface lets the card plug into existing computer systems.
Precision support spans INT4 to INT16
The EIC core supports INT/UINT8 and INT/UINT4 precision. The PIC core accepts INT4/UINT4 inputs and delivers INT4, INT8 or INT16 outputs.
Target workloads include trading, chip design and quality inspection
Lightelligence names three initial application areas:
- Financial engineering, covering high-frequency trading and risk analysis.
- Electronic design automation, supporting complex IC design and verification.
- AI tasks such as image analysis, image recognition and industrial quality inspection.
The company says PACE2 is the first implementation of optoelectronic hybrid computing in complex commercial models. It also lists AI for Science, biomedicine and materials discovery as areas where optical computing is moving toward commercial deployment.